The present invention relates generally to semiconductor device manufacturing and, more specifically, to an apparatus and method for determining a load between a processor and a heat spreader.
An electronic package typically includes a substrate, a processor, an array of electrical connections between the substrate and the processor, a thermal interface material (TIM) and a heat spreader. During operation of the chip, the heat generated by the processor is transferred from the processor, through the TIM and into the heat spreader so that a temperature of the processor can be maintained at or below a predetermined level.
During late assembly processes of electronic packages, the electronic packages are often placed under compressive loads, which generate high compression forces on various components of the electronic packages. These compression forces can lead to electrical failures of the processor if a magnitude of the compression forces exceeds certain levels. It is, therefore, often necessary to measure and monitor the compressive load between the heat spreader and the processor. Such measurement and monitoring is difficult, however, due to the effectively limited compliance in the TIM in the late assembly stages and the limited space available to accommodate traditional load cells.